A potential security vulnerability in some Intel® Xeon® Processors with Intel® Software Guard Extensions (SGX) may allow escalation of privilege. Intel is releasing firmware updates to mitigate this potential vulnerability.
CVEID: CVE-2022-33196
Description: Incorrect default permissions in some memory controller configurations for some Intel® Xeon® Processors when using Intel® Software Guard Extensions which may allow a privileged user to potentially enable escalation of privilege via local access.
CVSS Base Score: 7.2 High
CVSS Vector: CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:N
Product Collection
|
Vertical Segment
|
CPU ID
|
Platform ID
—|—|—|—
3rd Gen Intel® Xeon® Scalable Processor family
|
Server
|
606A6
|
0x87
Intel® Xeon® D Processors
|
Server
|
606C1
|
01
Intel is releasing BIOS and microcode updates for the affected processors.
For the mitigation to be effective for Intel® SGX enabled systems, Intel recommends updating the microcode patch located in platform flash designated by firmware interface table (FIT) entry type1.
Details on the microcode loading points can be found at:
When the microcode update is applied via the FIT table the BIOS must also be updated. If the BIOS is not updated to the latest version with the microcode update when Intel® SGX is enabled, the system will hang. Loading this microcode update via the operating system is acceptable but will not provide the mitigation for this Intel® SGX issue.
For non Intel® (SGX) systems the microcode patch can be OS loaded.
Intel has released microcode updates for the affected Intel® Processors that are currently supported on the public github repository. Please see details below on access to the microcode:
GitHub*: Public Github: <https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files>__
This CVE requires a Microcode Security Version Number (SVN) update. To address this vulnerability, a SGX TCB recovery is planned, refer here for more information on the SGX TCB recovery process.****
This issue was found internally by Intel employees in collaboration with external researchers from Google.
Intel would like to thank Cfir Cohen, Erdem Aktas, Felix Wilhelm, James Forshaw and Josh Eads from Google.
Intel would like to thank Nagaraju Kodalapura Nagabhushana Rao, Przemyslaw Duda, Liron Shacham and Ron Anderson from Intel.
Intel, and nearly the entire technology industry, follows a disclosure practice called Coordinated Disclosure, under which a cybersecurity vulnerability is generally publicly disclosed only after mitigations are available.