Cortex-A77 cores (r0p0 and r1p0) are affected by erratum 1508412
where software, under certain circumstances, could deadlock a core
due to the execution of either a load to device or non-cacheable memory,
and either a store exclusive or register read of the Physical
Address Register (PAR_EL1) in close proximity.
CPE | Name | Operator | Version |
---|---|---|---|
cortex-a77_firmware | eq | 0p0-r | |
cortex-a77_firmware | eq | 1p0-r |