5.6 Medium
CVSS2
Attack Vector
LOCAL
Attack Complexity
LOW
Authentication
NONE
Confidentiality Impact
PARTIAL
Integrity Impact
NONE
Availability Impact
COMPLETE
AV:L/AC:L/Au:N/C:P/I:N/A:C
7.1 High
CVSS3
Attack Vector
LOCAL
Attack Complexity
LOW
Privileges Required
LOW
User Interaction
NONE
Scope
UNCHANGED
Confidentiality Impact
HIGH
Integrity Impact
NONE
Availability Impact
HIGH
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:H
0.0004 Low
EPSS
Percentile
12.7%
inappropriate x86 IOMMU timeout detection / handling IOMMUs process
commands issued to them in parallel with the operation of the CPU(s)
issuing such commands. In the current implementation in Xen, asynchronous
notification of the completion of such commands is not used. Instead, the
issuing CPU spin-waits for the completion of the most recently issued
command(s). Some of these waiting loops try to apply a timeout to fail
overly-slow commands. The course of action upon a perceived timeout
actually being detected is inappropriate: - on Intel hardware guests which
did not originally cause the timeout may be marked as crashed, - on AMD
hardware higher layer callers would not be notified of the issue, making
them continue as if the IOMMU operation succeeded.
Author | Note |
---|---|
mdeslaur | hypervisor packages are in universe. For issues in the hypervisor, add appropriate tags to each section, ex: Tags_xen: universe-binary |
5.6 Medium
CVSS2
Attack Vector
LOCAL
Attack Complexity
LOW
Authentication
NONE
Confidentiality Impact
PARTIAL
Integrity Impact
NONE
Availability Impact
COMPLETE
AV:L/AC:L/Au:N/C:P/I:N/A:C
7.1 High
CVSS3
Attack Vector
LOCAL
Attack Complexity
LOW
Privileges Required
LOW
User Interaction
NONE
Scope
UNCHANGED
Confidentiality Impact
HIGH
Integrity Impact
NONE
Availability Impact
HIGH
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:H
0.0004 Low
EPSS
Percentile
12.7%