Improper MSR range used for x2APIC emulation

ISSUE DESCRIPTION

The MSR range specified for APIC use in the x2APIC access model spans 256 MSRs. Hypervisor code emulating read and write accesses to these MSRs erroneously covered 1024 MSRs. While the write emulation path is written such that accesses to the extra MSRs would not have any bad effect (they end up being no-ops), the read path would (attempt to) access memory beyond the single page set up for APIC emulation.

IMPACT

A buggy or malicious HVM guest can crash the host or read data relating to other guests or the hypervisor itself.

VULNERABLE SYSTEMS

Xen 4.1 and onward are vulnerable.
Only x86 systems are vulnerable. ARM systems are not vulnerable.